Quantum Error Correction (QEC)

D-Wave Demonstrates 99.9% Fidelity Entangling Gate for Dual-Rail Qubits Advancing Fault-Tolerant Quantum Computing

D-Wave Quantum Inc. has published peer-reviewed research in Nature demonstrating a high-fidelity two-qubit entangling gate for its superconducting dual-rail architecture. The gate achieves approximately 99.9% fidelity in about 500 nanoseconds while maintaining the experimentally observed dual-rail error hierarchy. Simulations suggest an error-reduction factor approaching 10 under favorable assumptions, with potential to reduce physical qubit overhead. The results reinforce D-Wave’s dual-platform roadmap targeting a 100-logical-qubit system by 2032.

August 5, 2026

Heguang Quantum Reports Seed Round and Progress Toward Deterministic Photonic GKP Error Correction

Hangzhou-based Heguang Quantum has announced completion of a seed round and reported progress toward deterministic generation of photonic Gottesman-Kitaev-Preskill error correction codes. The company describes a proprietary pluggable nonlinear module intended to address probabilistic preparation barriers. Reported to be founded by Dr. Shang Yu, who trained under Academician Guo Guangcan, Heguang emphasizes modular distributed photonic systems and plans 2027 sales of its HQ10 quantum accelerator for hybrid classical-quantum use.

July 27, 2026

QuiX Quantum Delivers Carina Core Hardware Platform for 8-Qubit Photonic Quantum Computing

QuiX Quantum has delivered the Carina core hardware platform, an 8-qubit universal photonic quantum computing demonstrator based on 4-qubit graph states. The system, developed under the UPQC project with the German Aerospace Center (DLR), features chip-integrated photon sources, multiplexed generation of resource states, and a 10 MHz clock cycle with support for more than 10 optimized gate operations per cycle. A dedicated emulator provides simulation and circuit optimization capabilities. Carina advances practical research into algorithms such as Shor’s, Deutsch’s, Grover’s, and quantum teleportation while supporting error correction studies. The low-power design positions the platform for hybrid computing environments.

July 18, 2026

Quantum Elements and Planckian Partner to Develop Architecture-Specific Digital Twins for Superconducting Quantum Processors

Quantum Elements and Planckian have announced a development agreement to create architecture-specific noise models and digital twin capabilities for Planckian’s novel superconducting quantum processors. The work will characterize coherence, leakage, and operation-level errors to support evaluation of quantum error correction schemes on classical hardware. This builds on prior demonstrations of large-scale, hardware-faithful simulations, including a 97-qubit surface-code experiment. The collaboration aims to provide a realistic noise environment for designing fault-tolerant strategies ahead of physical scaling. The partnership combines Quantum Elements’ AI-powered digital twin platform with Planckian’s shared-control superconducting architecture.

July 18, 2026

Alice & Bob Proposes Five-Criteria Framework to Benchmark Logical Qubit Claims

Alice & Bob has published a whitepaper defining five criteria to benchmark logical qubit claims. The framework provides a modality-agnostic way to evaluate demonstrations of quantum error correction for fault-tolerant quantum computing. Key requirements include achieving breakeven with physical qubits, using scalable code parameters, running sufficient QEC cycles, measuring performance across all runs without post-selection, and operating on utility-relevant timescales. This structured approach enables consistent comparisons across hardware modalities and aligns claims with practical FTQC needs.

June 7, 2026

Silicon Quantum Processor Logical Operations Mark Key Step in China Research

A research team in Shenzhen has built a small silicon quantum processor that performs a complete set of logical operations while detecting errors. Scientists encoded four physical qubits into two logical qubits and successfully ran single-qubit and two-qubit gates. They even executed a basic algorithm to estimate the ground-state energy of a water molecule. This progress shows silicon could support reliable, large-scale quantum machines compatible with existing chip manufacturing.

March 27, 2026

Quantum Machines Launches Open Acceleration Stack Alongside NVIDIA, AMD and Riverlane to Deliver Next Level of Hybridization

Quantum Machines today, unveiled The Open Acceleration Stack, a modular framework for hybrid quantum-classical systems. It supports ultra-low latency links via NVIDIA NVQLink and OPNIC. Partners emphasize its role in scaling error-corrected quantum computing. Demonstrations occur at the APS Summit in Denver.

March 16, 2026

Pasqal and Riverlane Collaborate on Fault-Tolerant Quantum Computing

Pasqal partners with Riverlane to merge neutral atom quantum systems with a specialized quantum error correction stack. Their collaboration aims to overcome reliability barriers by detecting and correcting errors in real time. Together, the two teams foresee industry-wide benefits for fields such as energy storage, pharmaceuticals, and artificial intelligence.

December 14, 2024

Equal1 Achieves Major Quantum Computing Breakthrough with Silicon Qubit Array

Equal1 has announced a significant breakthrough in quantum computing, demonstrating world-leading performance for a silicon qubit array and developing the most complex quantum controller chip to date. This advancement leverages existing silicon infrastructure, paving the way for scalable, fault-tolerant quantum computers. The introduction of the multi-tile Quantum Controller Chip marks a new era of advanced control electronics operating at cryogenic temperatures.

December 3, 2024

Tag: Quantum Error Correction (QEC)