NUS Spintronic Processors Deliver 3.2-Fold Speedup and 58% Energy Savings for Optimization Tasks
Key Takeaways
Performance Gains: Probabilistic spintronic processors based on magnetic tunnel junctions achieve a 3.2-fold speedup and 58.3 percent energy reduction compared with conventional CPU implementations on quadratic assignment problems.
Advantage Over Quantum Annealers: The hardware consistently produces feasible, high-quality solutions across tested instances, while commercial quantum annealers encounter increasing difficulty returning feasible solutions as problem size grows.
Algorithmic Enhancements: Cluster parallel update methods yield up to 10-fold acceleration on sparsely connected graphs, and simulated quantum annealing improves solution quality by a factor of 20 while increasing robustness to device variability.
Researchers at the National University of Singapore have demonstrated probabilistic computing hardware built from spintronic devices accelerating complex optimization workloads while lowering energy consumption, providing a practical near-term pathway for applications in artificial intelligence, logistics, scheduling and electronic design automation.
Magnetic Tunnel Junction Probabilistic Ising Processors
The team, led by Professor Yang Hyunsoo of the Department of Electrical and Computer Engineering in the College of Design and Engineering, reported two advances published in Nature Communications. In the first study, researchers implemented a parallel magnetic tunnel junction-based probabilistic Ising processor incorporating 144 compact spintronic tuneable random number generators. The system solved quadratic assignment problems and delivered a 3.2-fold speedup together with 58.3 percent energy savings relative to a CPU baseline.
When benchmarked against D-Wave quantum annealers on the same quadratic assignment problem set, the spintronic processor returned feasible high-quality solutions across the full dataset. Quantum annealers showed declining ability to produce feasible solutions as instance size increased.
The second study scaled the approach to a probabilistic Ising machine constructed from 250 spin-transfer-torque magnetic tunnel junctions. A cluster parallel update method achieved 10-fold acceleration for sparsely connected graphs without hardware modification. Experimental implementation of simulated quantum annealing further improved solution quality by a factor of 20 compared with conventional simulated annealing and enhanced tolerance to device-to-device variability.
Professor Yang Hyunsoo stated quantum computing remains an important long-term direction, yet many optimization problems require practical solutions today. The results indicate the spintronic probabilistic computing can deliver measurable gains in speed, energy efficiency and solution quality on hardware platforms closer to near-term deployment. First author Mr Yang Shuhan, a PhD student at NUS, noted the approach treats randomness as a computational resource rather than a source of error, combining stochastic magnetic devices with parallel architectures and advanced annealing algorithms.
Near-Term Applications and Hardware Scaling Path
The demonstrated systems target energy-efficient optimization platforms suitable for artificial intelligence training and inference, logistics routing, financial modelling, communications optimization and electronic design automation. The research involved collaborators from the Indian Institute of Technology Madras, Politecnico di Bari, the University of Messina, Istituto Nazionale di Geofisica e Vulcanologia and Peking University.
Next steps include further hardware scaling and exploration of chiplet-based architectures to support larger probabilistic computing systems. These developments position spintronic probabilistic processors as a complementary technology which may address demanding optimization workloads while quantum computing systems continue to mature.
Find out more here.
Further articles, reports, and the latest quantum computing news may be found at The Qubit Report.
Related Articles
Quantum Computing Weekly Round-Up: Week Ending July 11, 2026
This week delivered the kind of concrete progress that separates hype from execution. Keyfactor secured over $1B in growth capital while Qiz Security raised $17M
BTQ Technologies and ICTK Complete Design of Next-Generation QCIM-PUF Security Chip
BTQ Technologies and ICTK have completed the design of their next-generation QCIM-PUF security chip. This achievement combines BTQ’s QCIM cryptographic accelerator with ICTK’s VIA PUF
SEALSQ and Quobly Sign $5M Commercial Agreement to Integrate Post-Quantum Security into Silicon Quantum Computing Platforms
SEALSQ Corp and Quobly announced a $5 million commercial agreement to integrate post-quantum security technologies into Quobly’s silicon quantum computing platforms. This deal marks the